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VLSI Knowledge, Straight From the Training Floor

Articles, student case studies and a newsletter — everything we publish to help you understand the industry before you're in it.

Blog

Explainers & Career Notes

Short, practical reads on VLSI concepts, tools and career paths — written for people getting started.

RTL → GDSII
PHYSICAL DESIGN6 MIN READ

The VLSI Flow, Explained in Five Stages

A plain-language walk from RTL to GDSII — what each stage actually does and who owns it on a real team.

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SETUP / HOLD
PHYSICAL DESIGN7 MIN READ

Setup vs. Hold Violations: A Beginner's Guide to STA

Why timing closure trips up new engineers, and the mental model that makes STA click.

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UVM 101
VERIFICATION8 MIN READ

Why Every Verification Engineer Learns UVM First

What UVM actually solves, and why constrained-random testing beats writing every test by hand.

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LAYOUT
LAYOUT DESIGN5 MIN READ

Device Matching: The Layout Skill Nobody Explains Well

Why identical transistors on paper don't behave identically on silicon — and how layout fixes it.

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CAREERS
CAREERS6 MIN READ

RTL vs. Physical Design vs. Verification: Which Fits You?

A framework for choosing your VLSI specialization based on how you actually like to think and work.

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EMBEDDED
EMBEDDED6 MIN READ

Getting Started with Embedded C: A Fresher's Roadmap

The order to learn embedded concepts in, and the first project that actually teaches you something.

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Case Studies

Student Outcomes, In Detail

A closer look at how specific students moved from a course to a working project to a role.

DESIGN VERIFICATION

From Zero Verification Background to Leading Testbench Reviews

A student with a purely RTL background used the SystemVerilog and verification track to move into a verification-focused role.

Challenge

No prior exposure to verification methodology or SystemVerilog constructs.

Approach

Completed SV Language Constructs, then built a self-checking testbench as a capstone project.

Outcome

Now leads testbench reviews on a verification team.

PHYSICAL DESIGN

A Physical Design Capstone That Became an Interview Story

A fresher used the PNR and STA tracks to build a full-chip project that became the centerpiece of their job interviews.

Challenge

Strong fundamentals but no hands-on tool experience.

Approach

Worked through CMOS Fundamentals, PNR and STA, closing timing on a real sample design.

Outcome

Walked interviewers through the exact project during their placement process.

EMBEDDED DESIGN

From Non-CS Background to Embedded Systems Trainee

A non-CS graduate used the Embedded C track to build a working sensor-to-cloud prototype.

Challenge

No formal programming background before starting.

Approach

Completed Embedded C Programming, then built an IoT monitoring node as a project.

Outcome

Placed as an embedded systems trainee within months of finishing the course.

Newsletter

The Atharva Silicon Signal

A short, monthly email — new course drops, VLSI industry notes, and student project highlights.

ISSUE 04 · AUG 2026

What Changed in the PNR Track This Quarter

Updated lab content and two new case studies added to the Physical Design curriculum.

ISSUE 03 · JUL 2026

5 Questions to Ask Before Choosing a VLSI Track

A short framework we now share with every new student during counselling.

ISSUE 02 · JUN 2026

Student Spotlight: From Fundamentals to Physical Design

How one student's fresher-track project became their placement portfolio piece.