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Showing 1-6 of 9 results
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11 Students
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38 Hours
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5th Floor, opposite to the Prajay Megapolis partment, Gokul plots, KPHB, Hyderabad
Key Highlights Industry-focused advanced curriculum Hands-on lab sessions with real-time tools Training by experienced industry professionals Mini projects and case studies Career guidance and placement assistance
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10 Students
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38 Hours
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5th Floor, opposite to the Prajay Megapolis partment, Gokul plots, KPHB, Hyderabad
Key Topics Covered Introduction to EDA Tools VLSI Design Methodologies ASIC & SoC Design Flow Tools Simulation & Debugging Tools Version Control & Project Management
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10 Students
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38 Hours
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5th Floor, opposite to the Prajay Megapolis partment, Gokul plots, KPHB, Hyderabad
Key Features of the Course Introduction to Specialized Layout Device Layout Fundamentals Matching Techniques Parasitic Effects in Layout Analog Layout Techniques
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10 Students
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40 Hours
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5th Floor, opposite to the Prajay Megapolis partment, Gokul plots, KPHB, Hyderabad
Course Description The ECO (Engineering Change Order) & Sign-off Checks module at Atharva Silicon Institute is designed to teach students the final and most critical stage of the VLSI Physical...
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10 Students
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40 Hours
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5th Floor, opposite to the Prajay Megapolis partment, Gokul plots, KPHB, Hyderabad
Course Description Static Timing Analysis (STA) is one of the most critical stages in the VLSI physical design flow. It ensures that digital circuits operate reliably at the required clock...
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10 Students
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40 Hours
Course Description The CMOS Fundamentals & Layout course at Atharva Silicon Institute is designed to build a strong foundation in CMOS technology, digital circuit design, and IC layout techniques. This...