Digital Physical Design Flow (PNR)

The Digital Physical Design Flow (Place and Route – PNR) course at Atharva Silicon Institute is designed to provide students and engineers with comprehensive knowledge of the complete VLSI Physical Design implementation process used in modern semiconductor industries. This course focuses on transforming a synthesized netlist into a manufacturable chip layout, ensuring optimal performance, power efficiency, and area utilization.

Students will gain hands-on experience with industry-standard methodologies used in advanced semiconductor design companies. The training covers the entire backend design flow, from floorplanning to final sign-off checks, enabling learners to understand real-time chip design challenges.

Our practical approach ensures that participants develop the necessary skills required to work as Physical Design Engineers in leading semiconductor companies.